/**
 ******************************************************************************
 * @file    cfgtop.h
 * @author  hyseim software Team
 * @date    18-Aug-2023
 * @brief   This file provides all the headers of the cfgtop functions.
 ******************************************************************************
 * @attention
 *
 * Copyright (c) 2020 Hyseim. Co., Ltd.
 * All rights reserved.
 *
 * This software is licensed under terms that can be found in the LICENSE file
 * in the root directory of this software component.
 * If no LICENSE file comes with this software, it is provided AS-IS.
 *
 ******************************************************************************
 */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __CFGTOP_H__
#define __CFGTOP_H__

#ifdef __cplusplus
extern "C" {
#endif
/*------------------------------------------------------
 define offset address
----------------------------------------------------- */

#define  PADCFG_GPIOA0           (SCU_AO_BASE + 0x000)
#define  PADCFG_GPIOA1           (SCU_AO_BASE + 0x004)
#define  PADCFG_GPIOA2           (SCU_AO_BASE + 0x008)
#define  PADCFG_GPIOA3           (SCU_AO_BASE + 0x00c)
#define  PADCFG_GPIOA4           (SCU_AO_BASE + 0x010)
#define  PADCFG_GPIOA5           (SCU_AO_BASE + 0x014)
#define  PADCFG_GPIOA6           (SCU_AO_BASE + 0x018)
#define  PADCFG_GPIOA7           (SCU_AO_BASE + 0x01c)
#define  PADCFG_GPIOA8           (SCU_AO_BASE + 0x020)
#define  PADCFG_GPIOB0           (SCU_AO_BASE + 0x080)
#define  PADCFG_GPIOB1           (SCU_AO_BASE + 0x084)
#define  PADCFG_GPIOB2           (SCU_AO_BASE + 0x088)
#define  PADCFG_GPIOB3           (SCU_AO_BASE + 0x08c)
#define  PADCFG_GPIOB4           (SCU_AO_BASE + 0x090)
#define  PADCFG_GPIOB5           (SCU_AO_BASE + 0x094)
#define  PADCFG_GPIOB6           (SCU_AO_BASE + 0x098)
#define  PADCFG_GPIOB7           (SCU_AO_BASE + 0x09c)
#define  PADCFG_GPIOB8           (SCU_AO_BASE + 0x0a0)
#define  PADCFG_GPIOB9           (SCU_AO_BASE + 0x0a4)
#define  PADCFG_GPIOB10          (SCU_AO_BASE + 0x0a8)
#define  PADCFG_GPIOB11          (SCU_AO_BASE + 0x0ac)
#define  PADCFG_GPIOB12          (SCU_AO_BASE + 0x0b0)
#define  PADCFG_GPIOB13          (SCU_AO_BASE + 0x0b4)
#define  PADCFG_GPIOC0           (SCU_AO_BASE + 0x100)
#define  PADCFG_GPIOC1           (SCU_AO_BASE + 0x104)
#define  PADCFG_GPIOC2           (SCU_AO_BASE + 0x108)
#define  PADCFG_GPIOC3           (SCU_AO_BASE + 0x10c)
#define  PADCFG_GPIOC4           (SCU_AO_BASE + 0x110)
#define  PADCFG_GPIOD0           (SCU_AO_BASE + 0x180)
#define  PADCFG_GPIOD1           (SCU_AO_BASE + 0x184)
#define  PADCFG_GPIOD2           (SCU_AO_BASE + 0x188)
#define  PADCFG_GPIOD3           (SCU_AO_BASE + 0x18c)
#define  PADCFG_GPIOD4           (SCU_AO_BASE + 0x190)
#define  PADCFG_GPIOD5           (SCU_AO_BASE + 0x194)
#define  PADCFG_GPIOD6           (SCU_AO_BASE + 0x198)
#define  PADCFG_GPIOD7           (SCU_AO_BASE + 0x19c)
#define  PADCFG_GPIOD8           (SCU_AO_BASE + 0x1a0)
#define  PADCFG_GPIOD9           (SCU_AO_BASE + 0x1a4)
#define  PADCFG_GPIOD10          (SCU_AO_BASE + 0x1a8)
#define  PADCFG_GPIOE0           (SCU_AO_BASE + 0x200)
#define  PADCFG_GPIOE1           (SCU_AO_BASE + 0x204)
#define  PADCFG_GPIOE2           (SCU_AO_BASE + 0x208)
#define  PADCFG_GPIOE3           (SCU_AO_BASE + 0x20c)
#define  PADCFG_GPIOE4           (SCU_AO_BASE + 0x210)
#define  PADCFG_GPIOE5           (SCU_AO_BASE + 0x214)
#define  PADCFG_GPIOE6           (SCU_AO_BASE + 0x218)
#define  PADCFG_GPIOE7           (SCU_AO_BASE + 0x21c)
#define  PADCFG_GPIOE8           (SCU_AO_BASE + 0x220)
#define  PADCFG_GPIOE9           (SCU_AO_BASE + 0x224)
#define  PADCFG_GPIOE10          (SCU_AO_BASE + 0x228)
#define  PADCFG_GPIOE11          (SCU_AO_BASE + 0x22c)
#define  PADCFG_GPIOE12          (SCU_AO_BASE + 0x230)
#define  PADCFG_GPIOE13          (SCU_AO_BASE + 0x234)
#define  PADCFG_GPIOE14          (SCU_AO_BASE + 0x238)
#define  PADCFG_GPIOE15          (SCU_AO_BASE + 0x23c)
#define  PADCFG_GPIOF0           (SCU_AO_BASE + 0x280)
#define  PADCFG_GPIOF1           (SCU_AO_BASE + 0x284)
#define  PADCFG_GPIOF2           (SCU_AO_BASE + 0x288)
#define  PADCFG_GPIOF3           (SCU_AO_BASE + 0x28c)
#define  PADCFG_GPIOF4           (SCU_AO_BASE + 0x290)
#define  PADCFG_GPIOF5           (SCU_AO_BASE + 0x294)
#define  PADCFG_GPIOF6           (SCU_AO_BASE + 0x298)
#define  PADCFG_GPIOF7           (SCU_AO_BASE + 0x29c)
#define  PADCFG_GPIOF8           (SCU_AO_BASE + 0x2a0)
#define  PADCFG_GPIOF9           (SCU_AO_BASE + 0x2a4)
#define  PADCFG_GPIOF10          (SCU_AO_BASE + 0x2a8)
#define  PADCFG_GPIOF11          (SCU_AO_BASE + 0x2ac)
#define  PADCFG_GPIOG0           (SCU_AO_BASE + 0x300)
#define  PADCFG_GPIOG1           (SCU_AO_BASE + 0x304)
#define  PADCFG_GPIOG2           (SCU_AO_BASE + 0x308)
#define  PADCFG_GPIOG3           (SCU_AO_BASE + 0x30c)
#define  PADCFG_GPIOG4           (SCU_AO_BASE + 0x310)
#define  PADCFG_GPIOG5           (SCU_AO_BASE + 0x314)
#define  PADCFG_GPIOG6           (SCU_AO_BASE + 0x318)
#define  PADCFG_GPIOG7           (SCU_AO_BASE + 0x31c)
#define  PADCFG_GPIOG8           (SCU_AO_BASE + 0x320)
#define  PADCFG_GPIOG9           (SCU_AO_BASE + 0x324)
#define  PADCFG_GPIOH0           (SCU_AO_BASE + 0x380)
#define  PADCFG_GPIOH1           (SCU_AO_BASE + 0x384)
#define  PADCFG_GPIOH2           (SCU_AO_BASE + 0x388)
#define  PADCFG_GPIOH3           (SCU_AO_BASE + 0x38c)
#define  PADCFG_GPIOH4           (SCU_AO_BASE + 0x390)
#define  PADCFG_GPIOH5           (SCU_AO_BASE + 0x394)
#define  PADCFG_GPIOH6           (SCU_AO_BASE + 0x398)
#define  PADCFG_GPIOH7           (SCU_AO_BASE + 0x39c)
#define  PADCFG_GPIOH8           (SCU_AO_BASE + 0x3a0)
#define  PADCFG_GPIOH9           (SCU_AO_BASE + 0x3a4)
#define  PADCFG_GPIOH10          (SCU_AO_BASE + 0x3a8)
#define  PADCFG_GPIOH11          (SCU_AO_BASE + 0x3ac)
#define  PADCFG_GPIOH12          (SCU_AO_BASE + 0x3b0)
#define  PADCFG_GPIOH13          (SCU_AO_BASE + 0x3b4)
#define  PADCFG_GPIOH14          (SCU_AO_BASE + 0x3b8)
#define  PADCFG_GPIOH15          (SCU_AO_BASE + 0x3bc)

#ifdef __cplusplus
        }
#endif

#endif //_SPACC_H_
